1. Field of the Invention
The present invention relates to a semiconductor memory device and more particularly to a static random access memory (Static RAM).
2. Description of the Prior Art
An S-RAM, such as a high resistance load type S-RAM, for example, has memory cells each thereof being constituted, as shown in FIG. 6 showing the equivalent circuit of one memory cell, of a flip-flop circuit formed of a pair of an inverter consisting of a high resistance R.sub.1 and a MIS transistor Q.sub.1 and an inverter consisting of a high resistance R.sub.2 and a MIS transistor Q.sub.2, output of one inverter thereof being connected with input of the other inverter, and access transistors Q.sub.3 and Q.sub.4 made up of a pair of MIS transistors, in which the pair of access transistors Q.sub.3 and Q.sub.4 are connected with a pair of bit lines DL and DL. Reference character WL denotes a work line and V.sub.cc denotes a power supply terminal.
In semiconductor memory devices of the described type, there is one disclosed in Japanese Laid-open Patent Publication No. 62-293668, in which increase in packaging density is achieved by forming gate electrodes and word lines on a conductive layer as the first layer of a multiple layer wiring structure, forming grounding lines on a conductive layer as the second layer of the same, and forming resistor elements on a conductive layer as the third layer of the same. While these first, second, and third conductive layers are formed, for example, of polycrystalline silicon layers, and leads are let out as the bit lines DL and e,ovs/DL/ by means of wiring metallic layers, for example, Al metallic layers, provided on the topmost layer of the polycrystalline silicon conductive layers in the multiple layer structure, the bit lines on the topmost layer are electrically connected with the second conductive layer, formed under the topmost layer, electrically led out from diffusion regions serving as source regions of the access transistors Q.sub.3 and Q.sub.4. Therefore, there has been a roblem of lowered reliability on the device because of the connections being formed where there are differences in level, which may lead to such trouble as breaking of wire, and there has also been a demand for obtaining increased packaging density.